November 11, 2019

Computer Organization and Architecture - MCQS



Note: We have tried to upload as much as we can, all the question and answers might be shuffled - Please find the answer below each question, some answers might be wrong please review on the last date (some answers might be changed) if you find any wrong answer please comment down below or use the chat-bot on bottom right corner to get in touch with us.

Question 1:

A group of bits that tell the computer to perform a specific operation is known as
a. Instruction code
b. Micro-operation
c. Accumulator
d. Register

Select one:
a. d
b. b
c. a
d. c
Correct Answer: Instruction code


Question 2:
Two processors A and B have clock frequencies of 700 Mhz and 900 Mhz respectively. Suppose A can execute an instruction with an average of 3 cycles and B can execute with an average of 5 cycles. How much faster is the  processor compared to the other?(chose the closest answer)
a) 5 times
b) 3 times
c) Both take the same time
d) 1.3 times

Select one:
a. b
b. c
c. a
d. d
Correct Answer: 1.3 times

Question 3:
(2FA0C) 16 is equivalent to
a. 2576
b. (001011111011100) 2
c. Both (A) and (B)
d. (195084) 10

Select one:
a. a
b. d
c. b
d. c
Correct Answer: (195084) 10


Question 4:
Reverse Polish notation, expression A*B+C*D is written as
a.  AB*CD*+
b. A*BCD*+
c. AB*CD+*
d. A*B*CD+

Select one:
a. c
b. d
c. b
d. a
Correct Answer: AB*CD*+


Question 5:
Two processors A and B have clock frequencies of 700 Mhz and 900 Mhz respectively. Suppose A can execute an instruction with an average of 3 cycles and B can execute with an average of 5 cycles. For the execution of the same instruction which processor is faster?
a) A
b) B
c) Both take the same time
d) Insufficient information

Select one:
a. a
b. c
c. d
d. b
Correct Answer: A


Question 6:
Find the effective address of the following instruction : MUL 7(R2,R3)
a) 7+R2+R3
b) 7+(R2*R3)
c) 7+[R2]+[R3]
d) 7*([R2]+[R3])

Select one:
a. b
b. d
c. c
d. a
Correct Answer: 7+[R2]+[R3]



Question 7:
Suppose that a bus has 16 data lines and requires 4 cycles of 250 nsecs each to
transfer data. The bandwidth of this bus would be 2 Megabytes/sec. If the cycle time
of the bus was reduced to 125 nsecs and the number of cycles required for transfer
stayed the same what would the bandwidth of the bus?
a 1 Megabyte/sec
b 4 Megabytes/sec
c. 8 Megabytes/sec
d. 2 Megabytes/sec

Select one:
a. d
b. a
c. c
d. b
Correct Answer: 2 Megabytes/sec


Question 8:
Floating point representation of   (-0.75)10 is
a.10111111010000000000000000000000
b. 00111111010000000000000000000000
c. 11111111010000000000000000000000
d. 10111111010000000000000000001111

Select one:
a. b
b. a
c. d
d. c
Correct Answer: 10111111010000000000000000000000


Question 9:
Generally Dynamic RAM is used as main memory in a computer system as it
a. Consumes less power
b. has higher speed
c. has lower cell density
d. needs refreshing circuitry

Select one:
a. 1
b. d
c. b
d. c
Correct Answer: has higher speed


Question 10:
For a microprocessor having 32 data lines and 64 address lines ,maximum number of bits that can be stored in the memory is
a)64 x 2^32
b)32 x 2^32
c)32 x 2^64
d)64 x 324

Select one:
a. c
b. a
c. d
d. b
Correct Answer: 32 x 2^64

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